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My crazy project - Modern hardware in a NGPC cart
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I came across the sanni Cart Reader and saw there was an option for an adapter for NGPC carts and code that supported these carts:
https://github.com/sanni/cartreader/blob...er/NGP.ino

I then got to wondering how I could condense the hardware down into just a NGPC cart reader/writer.  I threw together a quick adapter and wired it to an Arduino Due which is a 3.3v board, so no level shifters needed.  In fact, no other hardware beyond a means of connecting wires from the cartridge to the Due are needed.  I got it dumping carts and started playing with erasing/flashing the unprotected sectors with the idea that I could dump and restore save data.  I plan to migrate to a smaller Teensy4.1 and put together a NGPC board for it.

After learning more about the flash memory and protocol, I got to thinking how I might be able to come up with my own dev cart.  I understand the few requirements the NGPC bios has for booting flash chips and how that is spoofed in existing solutions, so I got to work exploring options.  Finding compatible flash chips (40 pin or other form factor with 21 address lines and 8 data lines) ended up proving difficult if I didn't want to order pricey old stock from eBay.  I noticed NEO POCKET GD uses different flash chips with more pins.

At any rate, had I found compatible flash chips, I was also going to have to come up with some additional hardware to manage the spoofing.

I then got to wondering, "Can it all be handled in one package?"

That comes down to 4 sets of requirements:
1. It has to have enough GPIO.
2. It has to be fast enough.
3. It has to have enough onboard storage.
4. Low power use.

1. GPIO:
Ok, so I need 21 address lines, 8 data lines, and pins for Write Enable, Output Enable, Chip Enable for the first bank and Chip Enable for the 2nd bank if I want to go up to 32M flash.  We're talking 33 lines needing to be managed.

2. Speed:
I posed some questions to ChatGPT about this, and got these answers:
  • Access times for flash memory chips from the 90s typically ranged from 70 ns to 150 ns
  • Data throughput was limited by the access time and the width of the data bus, typically an 8-bit or 16-bit bus. This resulted in relatively low data transfer rates by modern standards.
  • Write speeds were much slower compared to read speeds, with typical write times for a single byte or word taking anywhere from 10 µs to 1 ms. Erase times for sectors could take several seconds.

3. Onboard Storage:
The max size of a NGPC cart is 32MiB which is 4MB.

4. Power usage:
I posed some questions to ChatGPT about this, and got these answers:
  • During read operations, power consumption was relatively low, often in the range of a few tens of milliwatts. Write and erase operations, however, consumed more power, typically up to 200 mW or so, but this was still quite modest.
  • In idle mode, where the chip is not actively reading or writing, power consumption was very low, often in the range of a few milliwatts or even less.
  • Standby currents were typically in the range of microamps to milliamps, depending on the chip.

A stand-out option to meet the requirements is the ESP32-S3-WROOM-1.
1. GPIO: More than 33 GPIO available.
2. Speed: Likely to be more than sufficient to quickly read the address lines and output the byte on the data lines.
3: Onboard storage:  There are options with 16MB onboard flash.
4: Power usage: This is an area where it maybe unavoidable to use more power than the stock chips.  There are some low power modes to enable when idle, and I should be able to rely on just the CE pins to activate the device.

The chips are pretty cheap, and board manufacturing is, too, so I'm throwing together a test.
We'll see how it goes.


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