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TLCS-900/H prefetch instruction queue test
The tests rely on register bank switching working correctly (the INCF instruction is being used to switch to the next register bank, and registers in other banks are also referenced explicitly).
And since self-modifying code is used in the tests they'll fail in any emulator that does some sort of dynarec CPU emulation and doesn't recompile an already compiled block if it's being written to.

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RE: TLCS-900/H prefetch instruction queue test - by mic_ - 10-17-2012, 04:05 AM

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