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TLCS-900/H prefetch instruction queue test
That's cool.

Two things I haven't figured out how to test yet:
* When exactly a byte in the instruction queue is discarded / marked as free. The 900-series is supposed to have a 3-stage pipeline, which I assume to mean Fetch->Decode->Execute. But whether or not all bytes in the queue belonging to the currently executing instruction are discarded before the Execute stage begins is something I don't know for sure.
* The order of prefetching and memory transfer in a microDMA transfer. The documentation states clearly that the first two states of a microDMA transfer are spent prefetching code unless the instruction queue is full, but to create a test to demonstrate this is kinda difficult since it needs to be synchronized perfectly.

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RE: TLCS-900/H prefetch instruction queue test - by mic_ - 10-17-2012, 07:28 PM

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